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  1 features ? transformerless 2w to 4w conversion ? controls battery feed to line ? programmable line impedance ? programmable network balance impedance ? off-hook and dial pulse detection ? protects against gnd short circuit ? programmable gain ? programmable constant current mode with constant voltage fold over ? transformerless balanced ringing with automatic ring trip circuit. no mechanical relay ? supports low voltage ringing ? line polarity reversal ? on-hook transmission ? power down and wake up capability ? meter pulse injection ? ground key detection applications line interface for: ? pabx ? intercoms ? key telephone systems ? control systems description the mitel MT91610, with an external bipolar driver (figure 4), provides an interface between a switching system and a subscriber loop. the functions provided by the MT91610 include battery feed, programmable constant current with constant voltage fold over for long loop, 2w to 4w conversion, off- hook and dial pulse detection, direct balance ringing with built in ring tripping, unbalance detection, user de?nable line and network balance impedances and gain, and power down and wake up. the device is fabricated as a cmos circuit in a 36 pin qsop package. figure 1 - functional block diagram td ring tip/ring drive controller audio gain & network balance circuit 2 w to 4 w conversion & line impedance line reverse line sense over-current protection circuit ring drive controller loop supervision tip rf1, rf2 rc vr z3 z2 cp5 lr vee gnd vdd cp3 cp2 shk vref gtx1 gtx0 vx cp6 driver rv rd ud dcri vbat pd esi ese cp4 cp7 cp1 package information MT91610aq 36 pin qsop package -40 c to +85 c MT91610 analog ringing slic preliminary information ds5181 issue 2 february 2000
MT91610 preliminary information 2 figure 2 - pin connections pin description pin # name description 1 vdd positive supply rail, +5v. 2td tip drive (output). controls the tip transistor. connects 150nf cap to gnd. 3 tf1 tip feed 1 (output). connects to the tip transistor and to tip via the tip feed resistor. 4nc no connection left open 5 tip tip. connects to the tip lead of the telephone line. 6 vref reference voltage (input). used to set the subscribers loop constant current. a 0.1uf cap should be connected between this pin and gnd for noise decoupling. 7lr line reverse (input). this pin should be set to 0v for normal polarity. setting the pin to +5v reverses the polarity of tip and ring 8 ring ring. connects to the ring lead of the telephone line 9 rf1 ring feed 1 (output). connects to the ring lead via the ring feed resistor 10 nc no connection left open 11 rd ring drive (output). controls the ring transistor. connects 150nf cap to gnd. 12 cp1 cp1 . a 220nf capacitor should be connected between this pin and pin 13 13 cp2 cp2. a 330nf capacitor for loop stability is connected between this pin and pin 14 14 cp3 cp3. a 330nf capacitor for loop stability is connected between this pin and pin 13 15 cp4 cp4 . a 100nf cap should be connected between this pin and gnd 16 ese external signal enable (input) . a logic 1 enable the mpi (meter pulse input) to tip / ring. this pin should be set to logic 0 when not used. 17 pd power down (input) . a logic 1 power down the device. this pin should be set to logic 0 for normal operation. 18 dcri dc voltage for ringing input (input) the positive voltage supply for balance ringing. the input dc voltage range is from 0v to +72v. 19 agnd analog ground. 4 wire ground, normally connected to system ground. vx vr vref cp7 vee ring rv gtx0 lr tip nc rf1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 36 35 34 33 32 31 30 29 28 27 26 25 24 23 tf1 vdd td nc rd cp1 cp2 cp3 shk vbat ud rc cp6 gtx1 esi z3 cp4 ese pd dcri 15 16 17 18 22 21 20 19 cp5 z1 z2 agnd
preliminary information MT91610 3 20 z1 line impedance node 1 . a resistor of scaled value "k" is connected between z1 and z2. this connection can not be left open circuit. 21 cp5 line impedance ac couple. a 0.1uf cap must be connected between this pin and z1 (pin 16) 22 z2 line impedance node 2 . this is the common connection node between z1 and z3. 23 z3 line impedance node 3 . a network either resistive or complex of scaled value "k" is connected between z3 and z2. this connection can not be left open circuit. 24 gtx0 gain node 0 . this is the common node between z3 and vx where resistors are connected to set the 2w to 4w gain. 25 vx transmit audio . 4w analog signal from the slic. 26 esi external signal input . 12 / 16 khz signal input 27 gtx1 gain node 1 . the common node between vr and the audio input from the codec or switching network where resistors are ?tted to sets the 4w to 2w gain 28 vr receive audio . 4w analog signal to the slic. 29 cp6 ringing cap. a 0.47uf cap should be connected between this pin and gnd for ringing voltage ?ltering. 30 rc ringing control. an active high (+5v) on this pin will set up the dc feed and gain of the slic to apply 20 hz ringing. when low (0v) set the slic in normal constant current mode of operation. 31 ud unbalance detect. to indicate an offset current between tip and ring 32 vbat vbat. the negative battery supply, typically at -48v 33 shk switch hook. this pin indicates the line state of the subscribers telephone. the output can also be used for dial pulse monitoring. this pin is active high 34 cp7 deglitching cap. a 33nf should be connected between this pin and gnd 35 rv ringing voltage. 20 hz sinusoidal or square wave ac in for balance ringing 36 vee negative supply rail, -5v. pin description (continued) pin # name description functional description refer to figure 4 for MT91610 components designation. the MT91610, with external bipolar transistors, functions as an analog line slic for use in a 4 wire switched system. the slic performs all of the borsh functions whilst interfacing to a codec or switching system. 2 wire to 4 wire conversion the slic performs 2 wire to 4 wire conversion by taking the 4 wire signal from an analog switch or voice codec, and converting it to a 2 wire differential signal at tip and ring. the 2 wire signal applied to tip and ring by the phone is converted to a 4 wire signal, which is the output from the slic to the analog switch or voice codec. gain control it is possible to set the transmit and receive gains by the selection of the appropriate external components. the gains can be calculated by the following formulae: 2w to 4w gain gain 2 - 4 = 20 log [ r8 / r7] 4w to 2w gain gain 4 - 2 = 20 log [0.891 * [r10 / r9)]
MT91610 preliminary information 4 impedance programming the MT91610 allows the designer to set the devices impedance across tip and ring, (z tr ), and network balance impedance, (z nb ), separately with external low cost components. the impedance (z tr ) is set by r4, r5, whilst the network balance, (z nb ), is set by r6, r8, (see figure 4.) the network balance impedance should be calculated once the 2w - 4w gain has been set. line impedance for optimum performance, the characteristic impedance of the line, (z o ), and the devices impedance across tip and ring, (z tr ), should match. therefore: z o = z tr the relationship between z o and the components that set z tr is given by the formula: z o / ( ra+rb) = kz o / r4 where kz o = r5 ra = rb the value of k can be set by the designer to be any value between 20 and 250. r4 and r5 should be greater than 50k w. network balance impedance the network balance impedance, (z nb ), will set the transhybrid loss performance for the circuit. the transhybrid loss of the circuit depends on both the 4 - 2 wire gain and the 2 - 4 wire gain. the method of setting the values for r6 (or z6... it can be a complex impedance) is given as below: r6 = r7 * (r9 / r10) * 2.2446689 * ( z nb / z nb + z o ) please note that in the case of z o not equal to z nb (the thl compromized case) r6 is a complex impedance. in the general case of z o matches to z nb (the thl optimized case) r6 is just a single resistor. loop supervision the loop supervision circuit monitors the state of the phone line and when the phone goes "off hook" the shk pin goes high to indicate this state. this pin reverts to a low state when the phone goes back "on hook" or if the loop resistance is too high (>2.3k w ) when loop disconnect dialing is being used, shk pulses to logic 0 indicate the digits being dialled. this output should be debounced. constant current control & voltage fold over mode the slic employs a feedback circuit to supply a constant feed current to the line. this design is accomplished by sensing the sum of the voltages across the feed resistors, ra and rb, and comparing it to the input reference voltage, vref, that determines the constant current feed current. by using a resistive divider network, (figure 3), it is possible to generate the required voltage to set the i loop . this voltage can be calculated by the formula: i loop = [ g * 5] * 3 (ra +rb) where, g = r2 / (r1 + r2) i loop is in ampere. r1= 200k w from figure 3 with ra = rb = 100 w for i loop = 20ma, r2 = 72.73 k w for i loop = 25ma, r2 = 100 k w for i loop = 30ma, r2 = 133.33 k w figure 3 - loop setting for convenience, a graph which plots the value of r2 (k w ) versus the expected loop current is shown in figure 6. r2 ** k w v ref 6 MT91610 r1 +5v c2 0.1uf ** see figure 6 200k
preliminary information MT91610 5 as +5v is used as the reference voltage to generate the loop current, any noise on the +5v rail will deteriorate the psr (power supply rejection) parameter of the slic. it is therefore important to decouple +5v to gnd. a 0.1uf cap at vref pin (pin6) is recommended. the MT91610 operating current mode is recommended to be between 20ma and 30ma. the device will automatically switch to voltage hold over mode should an unexpected long loop situation occur for a given programmed loop current. the lowest operational current should be 16ma with vbat set at -48v. a typical operating current versus loop resistance with vbat at -48v is shown in figure 7. ud & line drivers overcurrent protection the line drivers control the external battery feed circuit which provide power to the line and allows bi- directional audio transmission. the loop supervision circuitry provides bias to the line drivers to feed a constant current. overcurrent protection is done by the following steps: (a) external bipolar transistors to limit the current of the npn drivers to 50ma (figure 5). (b) the local controller should monitor the unbalance detection output (ud) for any extended period of assertion (>5 seconds). in such case the controller should power down the device by asserting the pd pin, and polls the device every 5 seconds. the ud output can be used to support gnd start loop in a pabx operation. please note that this ud output should be disregarded and masked out if rc pin is active (ie set to +5v). powering up / down sequence agnd is always connected powering up: +5v, -5v, vbat pd to +5v for 100ms; pd to 0v powering down: vbat, -5v, +5v balanced ringing & automatic ring tripping balanced ringing is applied to the line by setting the rc to +5v (pin 25) and connecting ringing signal (20hz) to rv (pin 35) as shown in figure 4. a 1.2vrms input will give approximately about 60vrms output across tip and ring, suf?cient for short loop slic application. the slic is capable of detecting an off hook condition during ringing by ?ltering out the large a.c. component. a 0.47uf cap should be connected to pin cp6 (pin 29) to form such ?lter. this ?lter allows a true off hook condition to be monitored at pin shk (pin 33). when an off hook condition is detected by the slic, it will remove the 20hz ac ringing voltage and revert to constant current mode. the local controller will, however, still need to deselect rc (set it to 0v). the MT91610 supports short burst of ringing cadence. a deglitching input (cp7) is provided to ensure that the shk pin is glitch free during the assertion and de-assertion of rc. a 33nf cap should be connected at this pin to gnd. a positive voltage source is required to be connected to the pin dcri (figure 5) for normal ringing generation. the slic can perform ringing even with the dcri input connected to 0v. however, it does require the vbat to be lower than -48v (ie at -53v or lower) and the 20hz ac input should be a square wave at 2vrms. line reversal the MT91610 can deliver line reversal, which is required in operation such as ani, by simply setting lr (pin 7) to +5v. the device transmission parameters will cease during the reversal. the lr (pin 7) should be set to 0v for all normal loop operations. power down and wake up the MT91610 should normally be powered down to conserve energy by setting the pd pin to +5v. the shk pin will be asserted if the equipment side (2 wire) goes off hook. the local controller should then restore power to the slic for normal operations by setting the pd pin to 0v. please note that there will be a short break (about 80ms) in the assertion time of shk due to the time required for the loop to power up and loop current to ?ow. the local controller should be able to mask out this time fairly easily.
MT91610 preliminary information 6 meter pulse injection the MT91610 provides a gain path input (esi) for meter pulse injection and an independent control logic input (ese) for turning the meter pulse signal on and off. additional circuit can be used to ensure good cancellation of meter pulse signal (figure 4) should it becomes audible at the 4 wire side. usually, the optional circuit is not required. gain (meter pulse) = 20 log [0.891 * (r10 / r11)] components selection feed resistors the selection of feed resistors, ra and rb, can signi?cantly affect the performance of the MT91610. the value of 100 w is used for both ra and rb. the resistors should have a tolerance of 1% (0.1% matched) and a power rating of 0.5 watt. calculating components value there are ?ve parameters a designer should know before starting the component calculations. these ?ve parameters are: 1) characteristic impedance of the line z o 2) network balance impedance z nb 3) value of the feed resistors (ra and rb) 4) 2w to 4w transmit gain 5) 4w to 2w receive gain the following example will outline a step by step procedure for calculating component values. given: z o = 600 w , z nb = 600 w , ra=rb= 100 w gain 2 - 4 = -6db, gain 4 - 2 = -1 db step 1: gain setting (r7, r8, r9, r10) gain 2 - 4 = 20 log [ r8 / r7] -6 db = 20 log [r8 / r7] \ choose r7 = 300k w , r8 = 150k w . gain 4 - 2 = 20 log [0.891 * [r10 / r9)] -1 db = 20 log [0.891 * [r10/ r9)] \ choose r9 = 200k w , r10 = 200k w . step 2: impedance matching (r4, r5) z o / ( ra+rb) = kz o / r4 where kz o = r5 r5 / r4 = 3 \ choose r4 = 100k w => r5 = 300k w step 3: network balance impedance (r6) optimized case z o = z nb r6 = r7 * (r9 / r10) * 2.2446689 * ( z nb / z nb + z o ) r6 = 300k w * (1) * 1.1223344 = 336.7k w step 4: the loop current (r2) in order to remain in constant current mode during normal operation, it is necessary that the following equation holds: {| i * zt |} v < { | vbat | - 6*vref - 2} v where, i = desirable loop current zt = ra + rb + maximum loop impedance vbat = battery voltage vref= dc voltage at vref pin given the parameters as follows: ra = rb = 100 w expected maximum loop impedance = 1.6k w ( including ra and rb) desirable loop current = 20ma 6*vref=8v then | vbat | (min) = 1600 * 0.020 +10 = 42v assume that the vbat of 42v is available, then read the value of r2 from figure 6, which is 50k w . step 5: calculation of non-clipping sinusoidal ringing voltage at tip ring (vtr) assume the ringing current is less than 40ma, the ringing voltage (20hz) at tip and ring is given as: vtr (rms) = 0.707 * {| vbat | + vdcri - (15.6 * vref)} vdcri= positive dc voltage at dcri pin vbat = negative battery voltage vref= positive dc voltage at vref pin ac voltage at the rv input pin is therefore rv (rms)~= vtr (rms) / 50
preliminary information MT91610 7 figure 4 - typical application with a resistive 600 ohm line impedance rv z1 cp5 z2 z3 gtx0 vx esi gtx1 +5v 35 20 21 c10 r4 r5 c5 c4 136 c6 2 td 3 4 5 8 9 tf1 vdd vee 22 23 24 25 26 28 vr ud 31 32 vbat shk vbat 33 c3 cp6 29 16 17 pd lr 7 30 rc rc 19 agnd rd cp7 11 34 18 dcri 15 cp4 cp3 tip ring ring rf1 nc vref2 c2 c11 c12 14 13 c13 c1 r2 13 12 11 10 9 8 1 2 3 4 5 6 7 -5v rc vbat +5v dcri_in pd tr_driver_610b 27 r7 r6 r8 r11 c8 r9 r10 r1 +5v cp2 cp1 6 ese = ground (earth) no connect 10 nc no connect c9 switch hook r13 shk c15 c14 unbalance detection ese power down pd line reverse ring control vr_in vx_out esi shk vbat_in tip ring voltage -5v c7 12 tf_br rf_br 8 15 14 pr1 ese * see functional description meter pulse injection r16 d1** ** optional
MT91610 preliminary information 8 component list r11 = 100k w r2 = see figure 6 r1,9,10 = 200k w r4 = 100k w r5,7,16 = 300k w r6 = 336k7 w r8 = 150k w r13 = 51k w c1,10 = 330nf, 5% c2,4,5,7,8 = 100nf, 5% c3 = 470nf, 5% c6 = 4.7uf, 5% c9 = 10nf, 5% c11 = 33nf, 5% c12 = 100nf, 5% c13 = 220nf, 5% c14,15 = 150nf, 5% d1 = 1n5819 schottky diode (optional) all resistors are 1/4w, 1% unless otherwise indicated. pr1 = this device must always be ?tted to ensure damages does not occur from inductive loads. for simple applications pr1 can be replaced by a single tvs, such as 1.5ke220c, across tip and ring. for applications requiring lightning and mains cross protection further circuitry will be required and the following protection devices are suggested: p2353aa, p2353ab (teccor), thbt20011, thbt20012, thbt200s (sgs-thomson), tisp2290, tssp8290l (t.i.) tf_br,rf_br= circuit breaker
preliminary information MT91610 9 figure 5 - line driver stage br rf ra dcri r28 r27 r29 r30 0v 0v vdd pd r23 r24 q4 vee r21 r22 q3 r26 q13 d13 r13 r11 r17 r12 q9 r14 r15 r32 c2 q12 vee r16 r19 q11 vbat_in d12 br tf rb r18 q3 q1 r25 d3 d4 tci vee vbat vbat d11 q10 r31 0v r3 r1 r7 r2 q7 r4 r5 r31 c1 q8 r6 r9 q5 r8 d3 d4 vbat q6 rci vee d9 d10 vbat tip rc ring q15 q14 pin 3 pin 7 pin 1 pin 2 pin 12 pin 13 pin 4 pin 5 pin 10 pin 11 pin 8 pin 9 pin 6 rf_br tf_br pin 14 pin 15
MT91610 preliminary information 10 component list r1,3,6,11,13,16 = 2.5k w r2,12 = 3.6k w r4,5,14,15 = 470 w r7,17,31,32 = 360 w r8,9,18,19 = 12 w ra, rb = 100 w 1%, 0.15% matched 1 w r21,26,27,30 = 30k w r22,25,28,29 = 3k w r23,24 = 20k w r21,26,27,30 = 3 k w r31 = 5.1 k w c1,2 = 10nf, 5% d1-8,13 = 1n4148 or equivalent d9,10,11,12 = 1n4005 or equivalent q1,3 = 2n2907 q2,4,14,15= 2n2222 q3 = bcp56 q5,7,9,11 = mpsa42 q6,8,10,12,13 = mpsa92 br =circuit breaker all resistors are 1/4w, 1% unless otherwise indicated.
preliminary information MT91610 11 figure 6 - approximated r2 (kohm) versus programmed loop current (ma) 145 140 135 130 125 120 115 110 105 100 95 90 85 80 75 70 65 60 55 50 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 r2 (kohm) vs loop current (ma ) loop current (ma) r2 (kohm)
MT91610 preliminary information 12 figure 7 - loop current (ma) versus loop resistance (ohm) loop current (ma) versus loop resistance (ohm) loop resistance (ohm) 31 30 29 28 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 0 200 400 600 800 1000 1200 1400 1600 27 1800 2000 2200 2400 2600 2800 3000 3200 3400 3600 3800 4000
preliminary information MT91610 13 . * exceeding these values may cause permanent damage. functional operation under these conditions is not implied. note 1: refer to figure 3 & 6 for appropriate biasing values note 2: tip and ring drivers to be limited to about 50ma externally (figure 5). if the ud pin is asserted for longer than 5 sec onds, then pd should be asserted to power down the device. the device should then be checked (by de-asserting pd) every 5 seconds. ? typical figures are at 25?c with nominal supply voltages and are for design aid only note 3: for a 1.2vrms 20hz input at rv terminal (figure 4) and with rc pin set to +5v. note 4: refer to figure 3 & 6 for biasing values absolute maximum ratings* parameter sym min max units comments 1 dc supply voltages v dd v ee v bat -0.3 +0.3 +0.3 +6.5 -6.5 -72 v v v 2 ringing voltages v ring 70 v rms differentially across tip & ring for a 1.5vrms input at rv (figure 4) 3 voltage setting for loop current v ref 0 5 v note 1 4 overvoltage tip/gnd ring/gnd, tip/ring e e 200 v max 1ms (with power on) 5 ringing current i ring 35 ma 6 tip / ring ground over-current 50 ma note 2 7 storage temp t stg -65 +150 ?c 8 package power dissipation p diss 0.10 w +85?c max, v bat = -48v 9 esd maximum rating 500 v recommended operating conditions parameter sym min typ ? max units test conditions 1 operating supply voltages v dd v ee v bat dcri 4.75 -5.25 -72 5 5.00 -5.00 -48 5.25 -4.75 -22 72 v v v v 50ma current capability 2 ringing voltage v ring 060 v rms note 3 3 voltage setting for loop current v ref 1.67 v i loop = 25ma, vbat = -48v note 4 4 operating temperature t o -40 +25 +85 ?c
MT91610 preliminary information 14 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ? typical figures are at 25 c with nominal 5v and are for design aid only. dc electrical characteristics ? characteristics sym min typ ? max units test conditions 1 supply current i dd i ee i bat 8 6 28 ma ma ma pd= 0v v bat = -48v l bat ~ l loop + 3 ma 2 supply current i dd i ee i bat 300 300 1.8 ua ua ma pd = 5v v bat = -48v 3 constant current line feed i loop 25 ma v ref =1.67v 4 operating loop constant current mode (including the dc resistance of the telephone set) r loop 1600 700 w w i loop = 20ma v bat = -48v i loop = 20ma v bat = -22v 5 off hook detection threshold s hk 14 ma 6 rc, lr input low voltage input high voltage v il v ih 4.5 0.5 v v l il = -1 m a l ih = 1 m a 7 pd, ese input low voltage input high voltage v il v ih 4.5 0.5 v v l il = -1 m a l ih = 1 m a 8 shk output low voltage output high voltage v ol v oh 2.7 0.4 v v l ol = 8ma l oh = -1ma 9 unbalance detection threshold i ud 12 ma 10 ud output low voltage output high voltage v ol v oh 2.7 0.4 l ol = 0.3ma l oh = -0.3ma 11 dial pulse distortion 1 ms
preliminary information MT91610 15 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ? typical figures are at 25 c with nominal 5v and are for design aid only. note 5: refer to figure 4 & 5 for set up and components value. note 6: tlrr is measured from the time when the lr pin is set to 0v (de-selected), to the time when the loop current is within 10% of its programmed steady state value. ac electrical characteristics ? characteristics sym min typ ? max units test conditions 1 ring trip detect time tt 90 200 ms 300hz to 3k4hz note 5 2 impedance (2w) z o 600 w 3 return loss (2w) rl 20 30 db 4 transhybrid loss thl 20 25 db 5 output impedance at vx 10 w ac small signal 6 gain 4 to 2 wire @ 1khz -1.5 -1 -0.5 db note 5 7 gain relative to 1khz 0.15 db 300 - 3400hz 8 gain 2w to vx @ 1khz -0.5 0 0.5 db note 5 9 gain relative to 1khz 0.15 db 300hz to 3.4khz 10 longitudinal to metallic balance at 2w lcl 55 db 300hz to 3.4khz 11 total harmonic distortion @2w @vx thd 0.3 0.3 1.0 1.0 % % 1vrms, 1khz @ 2w 1vrms, 1khz @ vr 12 common mode rejection 2 wire to vx cmr 45 50 db input 0.5vrms, 1khz 13 idle channel noise @2w @vx nc 12 12 dbrnc dbrnc cmessage filter fig. 4 cmessage filter fig. 4 14 power supply rejection ratio at 2w and vx vdd vee psr 23 23 db db 0.1vp-p @ 1khz 15 line reversal recovery timing tlrr 30 50 ms note 6
MT91610 preliminary information 16 qsop - quad shrink outline package dim 36-pin dim 36-pin min max min max a .096 (2.44) .104 (2.64) e .0315 inches (ref) 0.80mm a 1 .004 (0.10) .012 (0.30) h .398 (10.11) .414 (10.51) b .011 (0.26) .020 (0.51) l 0.16 (0.40) .050 (1.27) c .0091 (0.23) .0125 (0.32) q 08 d .598 (15.20) .606 (15.40) r .025 (0.63) .035 (0.89) e .291 (7.40) .299 (7.60) zd .0335 inches (ref) 0.85 e d zd h e b pin #1 r l gage plane 7 (.014) 0.335 a a1 a 0.51 x 45 (.020) 0.20 .008 7 0.63 (.025) .004 0.10 q c notes: 1. lead coplanitary should be 0 to 0.10mm (.004") max 2. package surface ?nishing (2.1) top matte: (charmilles #18-30) (2.2) all sides: (charmilles #18-30) (2.3) bottom matte: (charmilles #18-30) 3. all dimensions excluding mold ?ashes 4. max. deviation of center of package and center of leadrame to be 0.10mm (.004") 5. max. misalignment between top and bottom center of package to 0.10mm (.004") 6. end ?ash from the package body shall not exceed 0.152 (.006") per side (d) 7. dimension b shall not include dambar protrusion/intrusion and solder coverage. 8. not to scale 9. dimension in inches 10.dimensions in (millimeters)
preliminary information MT91610 17 notes:
m mitel (design) and st-bus are registered trademarks of mitel corporation mitel semiconductor is an iso 9001 registered company copyright 1999 mitel corporation all rights reserved printed in canada technical documen t a tion - n o t for resale world headquarters - canada tel: +1 (613) 592 2122 fax: +1 (613) 592 6909 north america asia/paci?c europe, middle east, tel: +1 (770) 486 0194 tel: +65 333 6193 and africa (emea) fax: +1 (770) 631 8213 fax: +65 333 6192 tel: +44 (0) 1793 518528 fax: +44 (0) 1793 518581 http://www.mitelsemi.com information relating to products and services furnished herein by mitel corporation or its subsidiaries (collectively mitel) is believed to be reliable. however, mitel assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by mitel or licensed from third parties by mitel, whatsoever. purchasers of products are also hereby noti?ed that the use of product in certain ways or in combination with mitel, or non-mitel furnished goods or services may infringe patents or other intellectual property rights owned by mitel. this publication is issued to provide information only and (unless agreed by mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, their speci?cations, services and other information appearing in this publication are subject to change by mitel without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a speci?c piece of equipment. it is the users responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in signi?cant injury or death to the user. all products and materials are sold and services provided subject to mitels conditions of sale which are available on request.


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